SIMT

Shared Foundations · Execution Hardware · also: Single instruction, multiple threads · simt.yaml

Lanes are presented as independent threads sharing an instruction stream. Lets ordinary branching code be written for vector hardware, at the cost of hiding when that code stops being vector-friendly.

• supersedescorrects · extends
• classifiesspecializes · part-of
• substitutes forapproximates · alternative-to
• depends onrequires · validates

Colour is the family; a dashed line is the second member of it.

This node

• extendsadds capability to SIMDlanes get their own program counter, so branches compile

Referenced by

• part-ofBranch Divergence is a subtopic of this
• requiresMemory Coalescing does not work without thisthe lanes must issue their loads in the same cycle
• requiresMeshlets and Mesh Shaders does not work without thisa cluster is sized to one workgroup's registers

References

• Background — Single instruction, multiple threads on Wikipedia